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Electronic circuits to perform standard software operations
This section looks at electronic circuits,
including how the basic logical operations come together in electronic circuits
to form the building blocks of the computer processing system.
Syllabus outcome
H1.3 A student describes how
the major components of a computer system store and manipulate data
The syllabus requires students
to “investigate how storage of data is performed by electronic circuitry”
and to “recognise that the design of such circuitry follows the same cyclic
process as that of the design of software” (SDD syllabus, p. 54).
Logic gates
These are the building blocks of the computer.
They represent the processes by which various operations combine binary numbers.
These gates can be combined to compete various operations.
The basic building blocks are the six logic
gates listed below.
|
Name |
Symbol |
Input |
Output |
|
AND |
|
Two signals |
One signal |
|
OR |
|
Two signals |
One signal |
|
NOT |
|
One signal |
One signal |
|
NAND |
|
Two signals |
One signal |
|
NOR |
|
Two signals |
One signal |
|
XOR |
|
Two signals |
One signal |
Truth tables
These tables reflect the input and output
patterns from the gates. They list all possible combinations and results from
each logic gate. Normally these entries are made in a logical order. This is
particularly important when combinations of gates are presented and a truth
table required.
AND
|
Input A |
Input B |
Output |
|
1 |
1 |
1 |
|
1 |
0 |
0 |
|
0 |
1 |
0 |
|
0 |
0 |
0 |
OR
|
Input A |
Input B |
Output |
|
1 |
1 |
1 |
|
1 |
0 |
1 |
|
0 |
1 |
1 |
|
0 |
0 |
0 |
NOT
|
Input |
Output |
|
1 |
0 |
|
0 |
1 |
NAND
|
Input A |
Input B |
Output |
|
1 |
1 |
0 |
|
1 |
0 |
1 |
|
0 |
1 |
1 |
|
0 |
0 |
1 |
NOR
|
Input A |
Input B |
Output |
|
1 |
1 |
0 |
|
1 |
0 |
0 |
|
0 |
1 |
0 |
|
0 |
0 |
1 |
XOR
|
Input A |
Input B |
Output |
|
1 |
1 |
0 |
|
1 |
0 |
1 |
|
0 |
1 |
1 |
|
0 |
0 |
0 |
Circuit design steps
- Identify inputs and outputs
- How many inputs are there?
- How are the inputs to be combined? (Normally two for each logic gate unless you are looking at the NOT gate).
- Look for opposites to identify the use of NOT gates
- Break the inputs into pairs to see if that makes it easier to identify patterns for AND and OR to start with.
- Identify required components
- List the components you have identified and draw
up a possible circuit.
- List the components you have identified and draw
up a possible circuit.
- Check solution with a truth table
- Draw up a truth table for your circuit and see if it matches the original.
- Evaluate the circuit design
- Is this the best possible solution or can you simplify it in any way?
Speciality circuits
These basic gates are combined to produce
a circuit that will add binary numbers together. There are two basic designs:
The half adder
Truth Table
|
Input A |
Input B |
Output |
Note: there is no place
in the circuit for more than the addition of two bits. A number of half
adders together are needed to deal with larger numbers. To cater for
the carry digit a further development is needed. This is seen in the
full adder. |
|
| |
|
Carry |
Sum |
|
|
1 |
1 |
1 |
0 |
|
|
1 |
0 |
0 |
1 |
|
|
0 |
1 |
0 |
1 |
|
|
0 |
0 |
0 |
0 |
|
The full adder
Truth Table
|
Carry |
Input A |
Input B |
Output |
Note: this basic circuit
adds up to three digits together, including the carry from any previous
section. |
|
| |
|
|
Carry |
Sum |
|
|
1 |
1 |
1 |
1 |
1 |
|
|
1 |
1 |
0 |
1 |
0 |
|
|
1 |
0 |
1 |
1 |
0 |
|
|
1 |
0 |
0 |
0 |
1 |
|
|
0 |
1 |
1 |
1 |
0 |
|
|
0 |
1 |
0 |
0 |
1 |
|
|
0 |
0 |
1 |
0 |
1 |
|
|
0 |
0 |
0 |
0 |
0 |
|
Flip-flops as a memory store
A flip-flop is a basic circuit used to
store binary data. This circuit changes state from 0 to 1 and back depending
on input and settings.
Activity
1. Given the circuit below, draw
up a truth table.
2. Given the truth table draw up a simple
circuit which could generate this table.
(a)
|
Input |
Output |
|||
|
A |
B |
C |
D |
|
|
1 |
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
0 |
1 |
|
1 |
1 |
0 |
1 |
1 |
|
1 |
1 |
0 |
0 |
1 |
|
1 |
0 |
1 |
1 |
1 |
|
1 |
0 |
1 |
0 |
0 |
|
1 |
0 |
0 |
1 |
0 |
|
1 |
0 |
0 |
0 |
0 |
|
0 |
1 |
1 |
1 |
1 |
|
0 |
1 |
1 |
0 |
0 |
|
0 |
1 |
0 |
1 |
0 |
|
0 |
1 |
0 |
0 |
0 |
|
0 |
0 |
1 |
1 |
1 |
|
0 |
0 |
1 |
0 |
0 |
|
0 |
0 |
0 |
1 |
0 |
|
0 |
0 |
0 |
0 |
0 |
(b)
|
Input |
Output |
|||
|
A |
B |
C |
D |
|
|
1 |
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
0 |
1 |
|
1 |
1 |
0 |
1 |
1 |
|
1 |
1 |
0 |
0 |
0 |
|
1 |
0 |
1 |
1 |
0 |
|
1 |
0 |
1 |
0 |
0 |
|
1 |
0 |
0 |
1 |
0 |
|
1 |
0 |
0 |
0 |
0 |
|
0 |
1 |
1 |
1 |
0 |
|
0 |
1 |
1 |
0 |
0 |
|
0 |
1 |
0 |
1 |
0 |
|
0 |
1 |
0 |
0 |
0 |
|
0 |
0 |
1 |
1 |
0 |
|
0 |
0 |
1 |
0 |
0 |
|
0 |
0 |
0 |
1 |
0 |
|
0 |
0 |
0 |
0 |
0 |
Ellen Sheerin
Circuits and symbols generated in LogicSim3.0b
software
