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9.9 Option - The Age of Silicon: 5. Circuits and information processing

Syllabus reference (October 2002 version)
5.Information can be processed using electronic circuits
Students learn to: Students:

Extract from Physics Stage 6 Syllabus (Amended October 2002). © Board of Studies, NSW.

[Edit: 21 Aug 08]

describe the behaviour of AND, OR and inverter logic gates in terms of high and low voltages and relate these to input and outputs

Consider the AND gate:

Venn Diagram, Truth tables, Boolean expression, logic gate and switch circuit
Logic 0 Logic 1
False True
Off On
High Low
Open switch Closed switch
AND gate, OR gate and NOT gate
fig995.3
Name Symbol Input Output
AND 995_7a Two signals One signal
OR 995_7b Two signals One signal
NOT 995_7c One signal One signal
NAND 995_7d Two signals One signal
NOR 995_7e Two signals One signal
XOR 995_7f Two signals One signal

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identify that gates can be used in combination with each other to make half or full adders

A half-adder

fig995.5

The need for two outputs to represent the sum of two binary 1s is obvious:

1 + 1 = 1 0

This is not ten, but two. The two digits are distinguished by their place or position relative to each other. The left-most digit is the significant bit (and is assigned the C for carry label); the right-most digit is the least significant bit (and is assigned the S for sum label).

A combination of gates in a circuit that adds two bits is called a half-adder. In the above case, this is achieved by combining an exclusive-OR and an AND gate.

A combination of gates in a circuit to add three bits is called a full-adder. The circuit below shows a combination of gates to produce a full-adder. A and B are the two inputs for this operation. CI (the third input digit) is the least significant bit from the two outputs of a separate half-adder circuit.

The term significant or least significant in front of 'bit' is necessary in order to correctly sequence the digits that represent the sum from the operation of the gates in the circuit. If all three inputs are carrying a 1, then the sum is 3 (the 1 from CI is the least significant bit from the other circuit). This is represented in binary code as 11 (see the truth table for the full-adder).

A full-adder

fig995.6

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identify data sources, plan, choose equipment or resources for, and perform first-hand investigations to construct truth tables for logic gates

  1. Use your own resources to draw circuit diagrams and truth tables to represent a three input OR gate (can you use a NOR gate and another gate to achieve the same result?).

    Solution

  2. Use your own resources to draw circuit diagrams and truth tables to represent a three input AND gate.

    Solution

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solve problems and analyse information using circuit diagrams involving logic gates

  1. Do this question from the 2003 HSC paper Selecting this link will take you to an external site. (Q 32. Scroll down to p 41 to find the question.)

    Solution

  2. Do this question from the 2004 HSC paper Selecting this link will take you to an external site. (Q 32 (b). Scroll down to p 37.)

    Solution

Truth table

A B C D E What is X Output
1 1 ? ? ? ? 1

Is there only one answer to X? Explain your answer.

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